Topic: Mdl 926 Revised Settlement Program
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Answers to Common Questions
Why can't I program the Logic Tile on my revision C PB926 + CT (A...
There is a design issue in the Versatile PB926EJ-S revision C baseboard JTAG circuit. This is only a problem when loading the Logic Tile FPGA configuration flash when there is a Core Tile mounted on top of the Logic Tile. When in debug mo... Read More »
Source: http://infocenter.arm.com/help/topic/com.arm.doc.faqs/14120.html
